Why TSMC should buy Cadence

means, motive & opportunity ...


by Peggy Aycinena


Ladies and Gentlemen of the Jury, there was actually only one reason that I went to DAC 2005 in Anaheim and that was to gather evidence to support a theory:

TSMC should buy Cadence.

What kind of evidence did I find at DAC to support my conjecture?

Lots.

*********************************

Means ...

First of all, let's look at the numbers (per Yahoo Financials):

Taiwan Semiconductor Manufacturing Co. Ltd.

  • Employees: 20,000+
  • Market Cap: $43 billion
  • Revenue: $8.12 billion
  • Gross margin: 42.92%
  • Operating margin: 33.59%
  • Net income: $2.89 billion

Cadence Design Systems Inc.

  • Employees: 4,900
  • Market Cap: $3.93 billion
  • Revenue: $1.22 billion
  • Gross margin: 81.26%
  • Operating margin: 11.23%
  • Net income: $84.25 million

Conclusion

  • TSMC has got the means to buy Cadence.
  • By a long shot.

*********************************

Motives ...

It's easy to site numerous motives that TSMC might have for buying Cadence:

* No. 1 – On June 10th prior to DAC, I had a long phone call with Ed Wan, TSMC's Senior Director of Design Service Marketing. He was explaining TSMC's new DFM Toolkits – Yield Plus & Yield Pro.

"Yield Plus, developed by TSMC and its EDA partners and implemented at the designer’s discretion, includes Action-Required rules, Recommended Advisories and Guidelines for semiconductor design. Also included are DFM utilities to implement the rules and advisories."

"Yield Pro includes several unique services that are implemented by TSMC at the manufacturing stage to quickly move a design into volume production. Yield Pro Services include a Lithography Process Check (LPC) Service, a Yield Sensitivity Analysis (YSA) Service; a Package Modeling Service; and sophisticated Scan Diagnostic services."

The more I listened to Ed brag on the TSMC announcement, the more TSMC sounded like an EDA company. I told Ed that if it walks like a duck and talks like a duck, it sure seems like a duck – Ed rigorously denied my allegations.

He said TSMC is not an EDA company. But clearly TSMC is concerned about the flow; they're concerned about getting design for manufacturing considerations/data into the designers' hands; they're concerned that the job of designing chips be more thoroughly integrated into the job of making chips.

TSMC's Toolkits "improve product yield, increase device performance and enhance semiconductor companies’ return on design investment … Together, these services create a powerful methodology that increases yield at the design stage, and in early semiconductor manufacturing stages. This accelerates production ramps, enabling greater returns on dollars spent on design and manufacturing."

What EDA Company today isn't saying exactly the same thing?

Motive # 1 – TSMC wants to be an EDA Company.


* No. 2 – On the same day they announced their new toolkits, TSMC also introduced their Reference Flow 6.0 – it "provides state-of-the-art access to TSMC’s 65-nanometer process technology. The new Reference Flow includes innovative power management features in a comprehensive EDA methodology that is supported, for the first time, by seamlessly integrated, low-power TSMC libraries. In addition, Reference Flow 6.0 provides new design for manufacturing (DFM) capabilities for faster yield ramps and increased return on investment."

What EDA Company today isn't, for all intents and purposes, saying exactly the same thing?

Motive # 2 – TSMC really wants to be an EDA company.


* No. 3 – On Tuesday morning, June 14th, I attended the DAC CEO panel. That's the one where the Big Boys in EDA show up and face off about burning issues in the industry.

Last year's panel included Mentor Graphic's Wally Rhines, Synopsys' Aart de Geus, and Cadence's Mike Fister. This year Wally, Aart and Mike were there again, but ARM CEO Warren East and UMC (United Microelectronics Corp.) CEO Jackson Hu were there as well – along with Jay Vleeschhouwer from Merrill Lynch doing Podium duty.

Hundreds turned out to witness the event and although many saw a high-profile DAC panel – with the "3-minute" opening statements, per usual, running 10 and 15 minutes long – I saw something more akin to a 90-minute Fellini movie, such were the conflicting realities between the left side and the right side of the stage.

Aart, Warren, and Wally had a love fest seated to the left of the podium – praising each other's tools, design flows, IP, interoperability, and mutual commitment to World Peace. They demonstrated their congeniality with on-stage smiles and hugs. It was heartwarming.

Alternatively on the right side of the podium, Jackson and Mike documented grim realities instead.

Jackson said it's a nightmare – tools vendors, designers and foundries all pointing fingers at each other today and demanding that the other guy be responsible for getting things right. As a result, he said the foundries need to start thinking and acting like Virtual IDMs, knitting the entire semiconductor design-to-manufacturing value chain into one cohesive whole. He said it was the foundries who will drive the process – who will insist on a greater linkage between design and manufacturing. Jackson said that's tomorrow's reality and he made it sound like a do-or-die proposition.

Mike also seemed troubled by nightmares. He was not smiling when he said Cadence needed to pay closer attention to customer needs, to provide kits of tools aimed at specific end-user markets, and to pursue opportunities for technical adjacencies.

As opposed to the left side of the stage, the world of design and manufacturing on the right side of the stage was not a happy place. It was a place of gritty, burdensome woes.

Meanwhile, in the middle of the stage at the podium, Jay made it abundantly clear that things just aren't working in EDA – on either the left or the right side of the stage. He begged the industry to improve its breadth, its growth, and its cash flow.

Motive # 3 – Foundries need to think and act like IDMs. EDA companies need to look to the larger world. Those agendas are both addressed if TSMC buys Cadence.


* No. 4 – On Wednesday, June 15th, I attended a mid-week DAC luncheon hosted by IBM, Chartered Semiconductor Manufacturing, ARM, Magma, Cadence, and Synopsys. The luncheon was a follow-on to the mega-announcement from those same companies – plus Samsung – in late May. These guys are joining forces, launching 90 and 65-nanometer "common platforms" to "leverage collaborate development," and together providing "leading-edge design and manufacturing solutions."

In other words, you're looking at something like the European Economic Block joining forces to take on The North American Economic Block. My theory, however, says that Cadence will leave the European Block to join the New World Block, with the caveat that the "New World" is no longer North America – it's Asia, home to TSMC.

Motive # 4 – TSMC needs to counter the emerging "IBM/Chartered/etc. Economic Block" by:

  • removing Cadence from the block and,
  • creating its own block.

*********************************

Opportunity ...

Having said all this, let's look at the opportunities that TSMC would be capitalizing on if it actually made the move to purchase Cadence.


* No. 1 – On Monday, June 13th, I started out the first day at DAC by attending the Cadence Press & Analyst Breakfast. Cadence had their entire team on hand, plus stage managers, music & props. Cadence, is nothing if not sophisticated and poised – at least in its public persona – and you should have been there.

Opportunity # 1 – Cadence is supremely confident – and what they don't know about M&A (probably) isn't worth knowing.


* No. 2 – On Sunday, May 22nd, The San Francisco Chronicle profiled the 200 highest paid executives in the Bay Area. The highest paid exec was Yahoo CEO Terry Semel with a total compensation package calculated to be at $131 million. The second highest paid executive in the Bay Area was Cadence CEO Mike Fister, with a total compensation package calculated at $37 million.

With numbers that large, for a company as small as Cadence, the only way Fister's mega-package can be explained is to presume that he's the catalyst needed to make a mega-deal happen. Clearly Intel's not going to buy Cadence – or else why would so many Intel exec's have bailed from the chip maker to join Fister's EDA enterprise?

On the other hand however, TSMC buying Cadence might be a great, logical, and do-able mega-deal. Perhaps Fister has what it takes to close such a deal, to create the ultimate "adjacency" for his company, and to solve the need for TSMC the foundry to re-invent itself as a "virtual IDM."

Opportunity # 2 – Cadence needs to prove to the stockholders of Cadence that the compensation package bestowed by the Cadence Board on the Cadence CEO is fully warranted. Being acquired by TSMC would provide that proof.


* No. 3 – "According to the most recent data from the National Science Foundation, 1.2 million of the world's 2.8 million university degrees in science and engineering in 2000 were earned by Asian students in Asian universities, with only 400,000 granted in the United States."

(Programming Jobs Losing Luster in U.S.
by Rachel Konrad, Associated Press Technology Writer)

TSMC is part of the Asian Equation. They play from an obvious position of strength in Taiwan, and a growing position of strength in the PRC and Singapore. They're well situated to take excellent advantage of the burgeoning intellectual capital represented by the legions of engineers coming on-line across Asia.

Opportunity # 3 – Cadence, like every EDA Company currently in existence, needs access to the Asian channels. TSMC would provide that channel.


* No. 4 – On Wednesday, June 16th, I had a chance to chat at length with Chuck Byers, Director of Worldwide Brand Management for TSMC, in the TSMC DAC booth. The booth was in the most primo of locations on the DAC Exhibit Hall floor – at the front of the room, near the entry doors, and generously sized. TSMC was an unmistakable presence at DAC.

Chuck and I chatted about TSMC's fabs in Taiwan, China, and Singapore. We talked about shrinking process geometries, capital equipment, libraries, IP, software, and international trade. I really enjoyed our chat because Chuck's a great conversationalist and a long-term and very loyal TSMC guy. He's also absolutely positive that TSMC is not looking to get into the EDA industry.

Unfortunately, he didn't convince me. What I saw in talking to Chuck was a company that has grown in 15 years from start-up to its current position as one of the largest semiconductor chip manufacturers in the world. I saw a company that has been aggressively nurtured by a visionary management team that never said never, and still never says never. With Chuck Byers and TSMC exuding that kind of sophistication and poise, it's hard to believe that their next step won't be yet another daring one.

Opportunity # 4 – TSMC is supremely confident. There would be true synergy between two companies who claim confidence, breadth, presence, and poise as their watchwords.

*********************************

Okay – there you've got it:

* Means.
* Motive.
* Opportunity.

Ladies and Gentlemen of the Jury, TSMC has the means, motives, and opportunity to buy Cadence. Everything I saw at DAC 2005 helped to support that conjecture, spirited disclaimers to the contrary notwithstanding.

Therefore, in my mind the question is not:

* If TSMC will buy Cadence.

The question is:

* When will TSMC buy Cadence.


*********************************


June 20, 2005

Peggy Aycinena owns and operates EDA Confidential. She can be reached at peggy@aycinena.com


Copyright (c) 2005, Peggy Aycinena. All rights reserved.