One point of view ...
EDA: 7 Grand Challenges
by Peggy Aycinena
The concept of a "Grand Challenge" is an established one in engineering, so here in 2012 what are the "Grand Challenges" in EDA?
Let's go out on a limb and name a few candidates:
No.1) Low power: This is the critical problem here in the era of mobile everything. If you can't guarantee low power for your device, it's going to go dark way too soon and be way too hot in the meanwhile.
No.2) Formal verification: There just has to be a way to guarantee that what we meant to design, has been designed and then manufactured. Isn't that the goal of formal verification, and isn't it true that we're not quite there?
No.3) 3D on-chip structures: In the last several years, this one's gotten a lot of attention, but it appears that there's still a lot of work to do - at least on the logic side of the equation.
No.4) Reconfigurable hardware: For some people, this one is the holy grail. If we can move from hard-wired solutions to flexable, reprogrammable solutions, we solve a host of problems including the need to know now what will sell 3 years from now, after the ASIC we're designing today finally comes off the line.
No.5) Expressing system-level specs: If we were better at describing what we want that black box we call the design flow to do for us, again we might be happier with the overall results, especially if ...
No.6) System-level tools: were a reality. Perhaps they already are a reality from some people's POV, but not everybody seems to be on board with this one.
No.7) Hardware/Software co-design: The idea seems so completely intuitive, but as with many things in engineering - so much more easily said than done.
That's it. The list may be incomplete and might be debated by many, but certainly one thing is clear: There's a lot of work to be done and, as a result, a lot of opportunity within EDA.
July 11, 2012
Peggy Aycinena owns and operates EDA Confidential:
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